ADDER X-SC Manual do Utilizador descarregar pdf (Página 67)

2.1. THE DESIGN OF A 4-BIT MULTIPLIER USING ADDER TREES 67

2.1.5 4-bit Multiplier

Since we have all the components of our multiplier we can start with a structural description of it.

entity multiplier4 is

port(a0,a1,a2,a3 : in bit;

b0,b1,b2,b3 : in bit;

vdd,vss : in bit;

p0,p1,p2,p3,p4,p5,p6,p7,p8 : out bit);

end multiplier4;

architecture structural of multiplier4 is

Component ppg4

port(a0,a1,a2,a3 : in bit;

b0,b1,b2,b3 : in bit;

vdd,vss : in bit;

p00,p01,p02,p03 : out bit;

p10,p11,p12,p13 : out bit;

p20,p21,p22,p23 : out bit;

p30,p31,p32,p33 : out bit);

end component;

Component wallace

port(p01,p02,p03 : in bit;

p10,p11,p12,p13 : in bit;

p20,p21,p22,p23 : in bit;

p30,p31,p32,p33 : in bit;

vdd,vss : in bit;

p1,p2,p3a,p3b,p4a,p4b,p5a,p5b,p6a,p6b,p7b : out bit);

end component;

Component add5

port(a3,a4,a5,a6 : in bit;

b3,b4,b5,b6,b7 : in bit;

vdd,vss : in bit;

s3,s4,s5,s6,s7,c7 : out bit);

end component;

signal p01,p02,p03 : bit;

signal p10,p11,p12,p13 : bit;

signal p20,p21,p22,p23 : bit;

signal p30,p31,p32,p33 : bit;

signal p3a,p3b,p4a,p4b,p5a,p5b,p6a,p6b,p7b : bit;

begin

-- partial product generation

ppg : ppg4

port map(a0 => a0, a1 => a1, a2 => a2, a3 => a3,

b0 => b0, b1 => b1, b2 => b2, b3 => b3,

vdd => vdd, vss => vss,

p00 => p0, p01 => p01, p02 => p02, p03 => p03,

p10 => p10, p11 => p11, p12 => p12, p13 => p13,

p20 => p20, p21 => p21, p22 => p22, p23 => p23,

p30 => p30, p31 => p31, p32 => p32, p33 => p33);

-- Wallace tree

w4 : wallace

port map(p01 => p01, p02 => p02, p03 => p03,

p10 => p10, p11 => p11, p12 => p12, p13 =>p13,

p20 => p20, p21 =>p21, p22 => p22, p23 =>p23,

p30 => p30, p31 => p31, p32 => p32, p33 =>p33,

vdd => vdd, vss => vss,

p1 => p1 , p2 => p2, p3a => p3a, p3b => p3b, p4a => p4a,

p4b => p4b, p5a => p5a, p5b => p5b, p6a => p6a, p6b => p6b,

p7b => p7b);

-- output adder

add : add5

port map(a3 => p3a, a4 => p4a, a5 => p5a, a6 => p6a,

b3 => p3b, b4 => p4b, b5 => p5b, b6 = > p6b, b7 => p7b,

vdd => vdd, vss => vss,

s3 => p3, s4 => p4, s5 => p5, s6 => p6, s7 => p7, c7 => p8);

end structural;

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ADDER X-SC Manual do Utilizador Página 67

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