ADDER X-SC Manual do Utilizador descarregar pdf (Página 19)

1.1. ASIMUT 19

Figure 1.6: One possible structural conﬁguration of our multiplexer circuit.

entity mux is

port (

a : in bit;

b : in bit;

c : in bit;

q : out bit;

vdd : in bit;

vss : in bit

); end mux;

architecture structural of mux is

signal s1 : bit; signal s2 : bit; signal s3 : bit;

Component andg

port (a : in bit;

b : in bit;

q : out bit;

vdd : in bit;

vss : in bit); end component;

Component org

port (a : in bit;

b : in bit;

q : out bit;

vdd : in bit;

vss : in bit); end component;

Component invg

port (a : in bit;

q : out bit;

vdd : in bit;

vss : in bit); end component;

begin

g1 : andg port map (a => a,

b => c,

q => s1,

vdd => vdd,

vss => vss);

g2 : invg port map (a => c,

q => s2,

vdd => vdd,

vss => vss);

g3 : andg port map (a => s2,

b => b,

q => s3,

vdd => vdd,

vss => vss);

g4 : org port map (a => s1,

b => s3,

q => q,

vdd => vdd,

vss => vss);

end structural;

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