ADDER X-SC Manual do Utilizador Página 30
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30 CHAPTER 1. INTRODUCTION TO THE ALLIANCE TOOLS
Table 1.7: Options Available for the COUGAR Tool.
Option Description
-t
Notifies a transistor level extraction, the symbolic layout cell is flattened to transistor layout
before extraction.
-f
The symbolic layout cell is flattened to the catalog level before extraction. Us e ”man catal”
for detail on the catalog file. If the catalog is empty, or doesn’t exist, the netlist is an
interconection of transistors, if it isn’t, the netlist is an interconection of gates or blocks
whose names are defined in the catalog.
-v
Verbose mode on. Each step of the extraction is displayed on the standard output, along
with some statistics.
-c
Generates a core file representing the conflictuel net, when COUGAR detects two external
connectors with different names on the same signal, or when it finds two external connectors
having the same name but not internally connected to the same net, or when it cannot
correctly extract an L shaped transistor.
-ac
Extract capacitance to ground on losig.
-ar
Extract interconnect resistance and capacitance to ground. Value of resistance foreach layer
can be changed in the RDS file.
file and output files to and from OCP).
% ocp mux_oo muxoop
@@@ @@@@ @ @@@@@@@
@@ @@ @@ @@ @@ @@
@@ @@ @@ @ @@ @@
@@ @@ @@ @ @@ @@
@@ @@ @@ @@ @@
@@ @@ @@ @@@@@
@@ @@ @@ @@
@@ @@ @@ @@
@@ @@ @@ @ @@
@@ @@ @@ @@ @@
@@@ @@@@ @@@@@@
Placer for Standards Cells
Alliance CAD System 5.0 20040928, ocp 5.0
Copyright (c) 2001-2005, ASIM/LIP6/UPMC
o Special Net detected : vss
o Special Net detected : vdd
o No More Mouvement Possible .....
Ocp : placement finished
This gives us a muxoop.ap file. We can visualize this file using the Alliance GRAAL tool. We call it from the
command line as graal and from its File menu we choose the muxoop.ap file. This is shown in Figure 1.12. We
Figure 1.12: The muxoop.ap (the mux design placed by OCP) shown by graal.
- Contents 3
- 4 CONTENTS 4
- List of Figures 5
- 6 LIST OF FIGURES 6
- List of Tables 7
- 8 LIST OF TABLES 8
- 10 LIST OF TABLES 10
- Chapter 1 11
- 1.1. ASIMUT 15 15
- 1.1. ASIMUT 19 19
- 1.3 BOOG 26
- 1.4 BOOM 26
- 1.5 COUGAR 29
- 1.5. COUGAR 31 31
- 1.5. COUGAR 33 33
- 1.6 DREAL 34
- 1.7 DRUC 36
- 1.8 FlatBeh 37
- 1.9 FLATLO 39
- 1.10 FLATPH 39
- 1.11 FMI 39
- 1.12 FSP 41
- 1.13 GENPAT 41
- 1.14 GRAAL 43
- 1.15 K2F 43
- 1.16 L2P 44
- Figure 1.18 46
- 1.17 LOON 47
- 1.18 LVX 48
- 1.19 MOKA 48
- 1.20 NERO 49
- 1.21 OCP 50
- 1.22 Proof 51
- 1.23 Ring 53
- 1.24 S2R 53
- 1.25 SCAPIN 53
- 1.26 SYF 54
- 1.27 VASY 55
- 1.28 X2Y 55
- 1.29 XFSM 56
- 1.30 XPAT 56
- 1.31 XSCH 57
- 1.32 XVPN 57
- Combinational Design Examples 59
- (a) (b) (c) 60
- 2.1.3 Adder Tree 64
- 2.1.4 Output Adder 66
- 2.1.5 4-bit Multiplier 67
- And set a few new ones 83
- Bibliography 87
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